add atapi helpers
Signed-off-by: Julien CLEMENT <julien.clement@epita.fr>
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@ -1,52 +1,117 @@
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use x86_64::instructions::port::Port;
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const CD_SECTOR_SIZE: usize = 2048;
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// Data buses
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const ATA_BUS_PRIMARY: u16= 0x1f0;
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const ATA_BUS_SECONDARY: u16 = 0x170;
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const ATA_DRIVE_MASTER: u16 = 0xa0;
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const ATA_DRIVE_SLAVE: u16 = 0xb0;
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// Drives
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const ATA_DRIVE_MASTER: u8 = 0xa0;
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const ATA_DRIVE_SLAVE: u8 = 0xb0;
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macro_rules! ATA_DATA {
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($reg:expr) => (reg);
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// Status bits
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const ATA_ERR: u8 = 1 << 0;
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const ATA_DRQ: u8 = 1 << 3;
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const ATA_SRV: u8 = 1 << 4;
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const ATA_DF: u8 = 1 << 5;
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const ATA_RDY: u8 = 1 << 6;
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const ATA_BSY: u8 = 1 << 7;
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// ATAPI signature
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const ATAPI_SIG_SC: u8 = 0x01;
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const ATAPI_SIG_LBA_LO: u8 = 0x01;
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const ATAPI_SIG_LBA_MI: u8 = 0x14;
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const ATAPI_SIG_LBA_HI: u8 = 0xeb;
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static ATAPI_SIG: [u8; 4] = [
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ATAPI_SIG_SC,
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ATAPI_SIG_LBA_LO,
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ATAPI_SIG_LBA_MI,
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ATAPI_SIG_LBA_HI
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];
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struct ATABus {
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// IO ports
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data: Port<u8>,
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features: Port<u8>, // write
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error: Port<u8>, // read
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sector_count: Port<u8>,
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address1: Port<u8>,
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address2: Port<u8>,
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address3: Port<u8>,
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drive_select: Port<u8>,
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command: Port<u8>, // write
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status: Port<u8>, // read
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dcr: Port<u8>,
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current_drive: u8,
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}
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macro_rules! ATA_ERROR {
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($reg:expr) => (reg + 1); // read
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}
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impl ATABus {
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pub fn new(port: u16) -> Self {
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ATABus {
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data: Port::new(port),
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features: Port::new(port + 1), // write
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error: Port::new(port + 1), // read
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sector_count: Port::new(port + 2),
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address1: Port::new(port + 3),
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address2: Port::new(port + 4),
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address3: Port::new(port + 5),
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drive_select: Port::new(port + 6),
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command: Port::new(port + 7), // write
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status: Port::new(port + 7), // read
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dcr: Port::new(port + 0x206),
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macro_rules! ATA_FEATURES {
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($reg:expr) => (reg + 1); // write
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}
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current_drive: 0,
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}
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}
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macro_rules! ATA_SECTOR_COUNT {
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($reg:expr) => (reg + 2);
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}
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fn select_drive(&mut self, drive: u8) {
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unsafe {
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self.drive_select.write(drive);
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}
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self.select_delay();
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self.current_drive = drive;
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}
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macro_rules! ATA_ADDRESS1 {
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($reg:expr) => (reg + 3);
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}
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fn is_atapi(&mut self) -> bool {
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macro_rules! ATA_ADDRESS2 {
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($reg:expr) => (reg + 4);
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}
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let mut sig: [u8; 4] = [0, 0, 0, 0];
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unsafe {
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sig[0] = self.sector_count.read();
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sig[1] = self.address1.read();
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sig[2] = self.address2.read();
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sig[3] = self.address3.read();
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}
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macro_rules! ATA_ADDRESS3 {
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($reg:expr) => (reg + 5);
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}
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ATAPI_SIG == sig
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}
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macro_rules! ATA_DRIVE_SELECT {
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($reg:expr) => (reg + 6);
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}
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fn wait_busy(&mut self) {
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let mut status = ATA_BSY;
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while (status & ATA_BSY) != 0 {
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unsafe {
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status = self.status.read();
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}
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}
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}
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macro_rules! ATA_STATUS {
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($reg:expr) => (reg + 7); // read
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}
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fn select_delay(&mut self) {
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unsafe {
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self.dcr.read();
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self.dcr.read();
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self.dcr.read();
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self.dcr.read();
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}
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}
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macro_rules! ATA_COMMAND {
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($reg:expr) => (reg + 7); // write
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}
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macro_rules! ATA_DCR {
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($reg:expr) => (reg + 0x206);
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fn wait_packet_request(&mut self) {
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let mut status = ATA_BSY;
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while (status & ATA_BSY) != 0 && (status & ATA_DRQ) == 0 {
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unsafe {
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status = self.status.read();
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}
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}
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}
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}
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