feat(serial): add serial initialization
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Signed-off-by: Julien CLEMENT <julien.clement@epita.fr>
This commit is contained in:
Julien CLEMENT 2021-12-03 18:55:30 +01:00
parent a6669d00c6
commit bec3630c11

@ -11,8 +11,18 @@ const COM3: u16 = 0x3e8;
#[allow(dead_code)]
const COM4: u16 = 0x2e8;
const ENABLE_TRANSMITTER: u8 = 0x1 << 1;
const FIFO: u8 = 0x1;
const TRIGGER_LVL_14: u8 = 0x3 << 6;
const CLEAR_TRANSMIT_FIFO: u8 = 0x1 << 2;
const CLEAR_REVEIVE_FIFO: u8 = 0x1 << 1;
const NO_PARITY: u8 = 0x0;
const EIGHT_BITS_LENGTH: u8 = 0x3;
const EMPTY_TRANSMITTER: u8 = 0x1 << 5;
const DLAB: u8 = 0x1 << 7;
lazy_static! {
pub static ref SERIAL1: Mutex<SerialPort> = {
@ -50,6 +60,9 @@ macro_rules! serial_println {
pub struct SerialPort {
base: Port<u8>,
interrupt_enable: Port<u8>,
fifo_control: Port<u8>,
line_control: Port<u8>,
line_status: Port<u8>,
}
@ -57,6 +70,9 @@ impl SerialPort {
pub fn new(port: u16) -> SerialPort {
SerialPort {
base: Port::new(port),
interrupt_enable: Port::new(port + 1),
fifo_control: Port::new(port + 2),
line_control: Port::new(port + 3),
line_status: Port::new(port + 5),
}
}
@ -86,7 +102,26 @@ impl SerialPort {
len
}
fn init(&mut self) {}
fn init_baud_rate(&mut self) {
let line: u8;
unsafe {
line = self.line_control.read();
self.line_control.write(line | DLAB);
self.base.write(3);
self.interrupt_enable.write(0);
self.line_control.write(line);
}
}
fn init(&mut self) {
self.init_baud_rate();
unsafe {
self.line_control.write(NO_PARITY | EIGHT_BITS_LENGTH);
self.fifo_control
.write(FIFO | TRIGGER_LVL_14 | CLEAR_TRANSMIT_FIFO | CLEAR_REVEIVE_FIFO);
self.interrupt_enable.write(ENABLE_TRANSMITTER);
}
}
}
impl fmt::Write for SerialPort {
@ -94,7 +129,7 @@ impl fmt::Write for SerialPort {
let len: usize = self.write_string(s);
match len {
l if l == s.len() => Ok(()),
_ => Err(fmt::Error)
_ => Err(fmt::Error),
}
}
}