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bec3630c11
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b9557bdc5e
@ -1,8 +1,8 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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mod serial;
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mod vga;
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mod vga;
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mod serial;
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use core::panic::PanicInfo;
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use core::panic::PanicInfo;
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use vga::Color;
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use vga::Color;
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@ -15,7 +15,8 @@ fn panic_handler(info: &PanicInfo) -> ! {
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#[no_mangle]
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#[no_mangle]
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pub extern "C" fn julios_main() -> ! {
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pub extern "C" fn julios_main() -> ! {
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println!("***JuliOS V0.1.0***");
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println!("Hello World!");
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serial_println!("Hello serial");
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println!("{}", "***JuliOS***");
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serial_println!("Test serial");
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panic!("Kernel end of flow");
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panic!("Kernel end of flow");
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}
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}
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@ -1,6 +1,6 @@
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use core::fmt;
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use core::fmt;
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use lazy_static::lazy_static;
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use spin::Mutex;
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use spin::Mutex;
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use lazy_static::lazy_static;
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use x86_64::instructions::port::Port;
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use x86_64::instructions::port::Port;
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const COM1: u16 = 0x3f8;
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const COM1: u16 = 0x3f8;
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@ -11,19 +11,6 @@ const COM3: u16 = 0x3e8;
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#[allow(dead_code)]
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#[allow(dead_code)]
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const COM4: u16 = 0x2e8;
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const COM4: u16 = 0x2e8;
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const ENABLE_TRANSMITTER: u8 = 0x1 << 1;
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const FIFO: u8 = 0x1;
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const TRIGGER_LVL_14: u8 = 0x3 << 6;
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const CLEAR_TRANSMIT_FIFO: u8 = 0x1 << 2;
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const CLEAR_REVEIVE_FIFO: u8 = 0x1 << 1;
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const NO_PARITY: u8 = 0x0;
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const EIGHT_BITS_LENGTH: u8 = 0x3;
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const EMPTY_TRANSMITTER: u8 = 0x1 << 5;
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const DLAB: u8 = 0x1 << 7;
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lazy_static! {
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lazy_static! {
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pub static ref SERIAL1: Mutex<SerialPort> = {
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pub static ref SERIAL1: Mutex<SerialPort> = {
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let mut serial_port = SerialPort::new(COM1);
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let mut serial_port = SerialPort::new(COM1);
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@ -35,10 +22,7 @@ lazy_static! {
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#[doc(hidden)]
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#[doc(hidden)]
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pub fn _print(args: ::core::fmt::Arguments) {
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pub fn _print(args: ::core::fmt::Arguments) {
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use core::fmt::Write;
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use core::fmt::Write;
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SERIAL1
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SERIAL1.lock().write_fmt(args).expect("Printing to serial failed");
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.lock()
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.write_fmt(args)
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.expect("Printing to serial failed");
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}
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}
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/// Prints to the host through the serial interface.
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/// Prints to the host through the serial interface.
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@ -60,76 +44,34 @@ macro_rules! serial_println {
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pub struct SerialPort {
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pub struct SerialPort {
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base: Port<u8>,
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base: Port<u8>,
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interrupt_enable: Port<u8>,
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fifo_control: Port<u8>,
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line_control: Port<u8>,
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line_status: Port<u8>,
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}
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}
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impl SerialPort {
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impl SerialPort {
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pub fn new(port: u16) -> SerialPort {
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pub fn new(port: u16) -> SerialPort {
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SerialPort {
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SerialPort {
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base: Port::new(port),
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base: Port::new(port)
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interrupt_enable: Port::new(port + 1),
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fifo_control: Port::new(port + 2),
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line_control: Port::new(port + 3),
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line_status: Port::new(port + 5),
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}
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}
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}
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}
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fn write_byte(&mut self, byte: u8) -> bool {
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fn write_byte(&mut self, byte: u8) {
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unsafe {
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unsafe {
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let status: u8 = self.line_status.read();
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match status & EMPTY_TRANSMITTER {
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0 => false,
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_ => {
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self.base.write(byte);
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self.base.write(byte);
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true
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}
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}
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}
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}
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}
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}
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fn write_string(&mut self, s: &str) -> usize {
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fn write_string(&mut self, s: &str) {
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let mut len: usize = 0;
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for byte in s.bytes() {
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for byte in s.bytes() {
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let written: bool = self.write_byte(byte);
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self.write_byte(byte);
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if !written {
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return len;
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}
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len += 1;
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}
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len
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}
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fn init_baud_rate(&mut self) {
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let line: u8;
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unsafe {
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line = self.line_control.read();
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self.line_control.write(line | DLAB);
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self.base.write(3);
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self.interrupt_enable.write(0);
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self.line_control.write(line);
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}
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}
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}
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}
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fn init(&mut self) {
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fn init(&mut self) {
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self.init_baud_rate();
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unsafe {
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self.line_control.write(NO_PARITY | EIGHT_BITS_LENGTH);
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self.fifo_control
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.write(FIFO | TRIGGER_LVL_14 | CLEAR_TRANSMIT_FIFO | CLEAR_REVEIVE_FIFO);
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self.interrupt_enable.write(ENABLE_TRANSMITTER);
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}
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}
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}
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}
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}
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impl fmt::Write for SerialPort {
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impl fmt::Write for SerialPort {
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fn write_str(&mut self, s: &str) -> fmt::Result {
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fn write_str(&mut self, s: &str) -> fmt::Result {
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let len: usize = self.write_string(s);
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self.write_string(s);
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match len {
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Ok(())
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l if l == s.len() => Ok(()),
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_ => Err(fmt::Error),
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}
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}
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}
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}
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}
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